Emulated Hardware¶
RAM map:
Addr (bytes)
╔════════════╤══════════════╗
║ 0x00000000 Start of RAM ║
║ . │ ║
║ 0x000E7F00 DISPLAY_START║
║ . + 0x18000 bytes║
║ . or 0x6000 words║
║ . or 1024x768x1px ║
║ 0x000FFF00 end of display║
║ . │ ║
║ 0x00180000 MemSize ║
╟────────── ┼ ────────────╢
║ │ ║
║ Empty ║
╟────────── ┼ ────────────╢
║ 0xFFFFF800 ROMStart ║
║ . │ ║
║ . IO_RANGE ║
║ 0xFFFFFFC0 | clock ║
║ 0xffffffc4 | switches/LEDs║
║ 0xffffffc8 | serial data ║
║ 0xffffffcc | serial status║
║ 0xffffffd0 | SPI data ║
║ 0xffffffd4 | SPI control ║
║ 0xffffffd8 | mouse ║
║ . │ ║
╚════════════╧══════════════╝
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class
oberon.risc.
ByteAddressed32BitRAM
[source]¶ Represent a 32-bit wide RAM chip that is byte-addressed.
E.g. addresses 0-3 are the first four bytes, or one (32-bit) word.
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BYTE_MASKS
= (4294967040, 4294902015, 4278255615, 16777215)¶
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class
oberon.risc.
Disk
(image_file)[source]¶ (I cribbed most of this from pdewacht/oberon-risc-emu . I’m not exactly sure how it works but it does work, well enough to load the Oberon OS from the disk image.)
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SECTOR_SIZE
= 512¶
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SECTOR_SIZE_WORDS
= 128¶
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STRUCT_FORMAT
= '<128I'¶
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diskCommand
= 0¶
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diskRead
= 1¶
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diskWrite
= 2¶
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diskWriting
= 3¶
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class
oberon.risc.
Keyboard
(initial_keys=())[source]¶ pdewacht/oberon-risc-emu/blob/master/src/sdl-ps2.c
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class
oberon.risc.
RISC
(rom, ram, PC=1073741312)[source]¶ The RISC processsor.
This class is designed for ease of introspection rather than efficiency.
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decode
(instruction)[source]¶ Decode the instruction and set various field and flag member values of the emulator object.
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dump_ram
(to_file=None, location=None, number=10, syms=None)[source]¶ Debug function, print a disassembly of a span of RAM.
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dump_rom
(to_file, location=None, number=10)[source]¶ Debug function, print a disassembly of a span of ROM.
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